Focus Areas
Key process windows
1
Photolithography
Photoresist 100 nm – 10 µm — pattern accuracy and yield.
2
Insulation / Passivation
SiO₂ / Si₃N₄ 10 nm – 1 µm — gate oxide & ILD performance.
3
Flexible Circuit Protection
PI / UV 5 – 50 µm — FPC flexibility and reliability.
Metrology Table
Process · Film · Range · Value
| Sub-scenario / Process | Film Layer | Thickness Range | Application & Metrology Value |
|---|---|---|---|
| Photolithography | Photoresist | 100 nm – 10 µm | Controls lithography pattern accuracy and impacts chip yield |
| Insulation / Passivation | Dielectric films (SiO₂, Si₃N₄) | 10 nm – 1 µm | Gate oxide layer, interlayer dielectric; determines electrical performance of devices |
| Flexible Circuit Protection | Polyimide (PI) / UV coating | 5 µm – 50 µm | FPC insulating protective layer; thickness affects flexibility and reliability |
Photolithography
Controls lithography pattern accuracy and impacts chip yield
Insulation / Passivation
Gate oxide layer, interlayer dielectric; determines electrical performance of devices
Flexible Circuit Protection
FPC insulating protective layer; thickness affects flexibility and reliability
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